Switching devices having both excellent operating characteristics and reliability are required in applications including bus switches in personal computers, antenna switches in mobile phones, and switches in automatic test equipment (ATE) used for testing ICs and LSIs. Photorelays and analog switches based on field effect transistors are expected as these switching devices instead of conventional mechanical contact relays. Power MOSFET devices are also required to have a high withstand voltage and a low on-resistance (Ron) and be capable of fast operation.
To meet these expectations, one of the inventors invented a switching device based on a lateral field effect transistor having a low on-resistance and a small output capacitance (Cout) (e.g., JP 2004-006731A (hereinafter referred to as Patent Document 1)).
For example, in the case of a transistor disclosed in FIG. 33 or 34 of Patent Document 1, the n+-type source regions 5 and the p+-type contact layers 6 are located equidistantly from the drain 7. That is, the source regions 5 and the contact layers 6 are both in contact with the base layer 4 along a common straight line. However, such collinear alignment of contact layers 6 with the source regions 5 narrows the effective channel width. More specifically, the path of electron current flowing from the base layer 4 into the source in the on-state is limited to only the portion of the n+-type source regions 5. The portion where the p+-type contact layers 6 are in contact with the base layer 4 does not serve as an outflow path for electrons. Therefore the effective channel width is narrowed, which results in an unfavorable structure from the viewpoint of reducing on-resistance.